motorola-rtwo: rewrite .dts modelled on mainline Sony Xperia 1 V

Same SoC, working mainline port. Strip everything speculative:
 - no /memory node (Sony relies on the bootloader to inject it)
 - no qcom,msm-id / qcom,board-id (Sony's Qualcomm bootloader doesn't
   need them)
 - no reserved-memory / ramoops / framebuffer overrides
 - regulator tree copied verbatim from Sony, including the rails it
   deliberately omits with 'the board seems to crash on access' - our
   MTP-derived tree (with vdd-*-supply chains + bob2 + L4) may have been
   voting an RPMh rail that resets the SoC early.
Only the debug UART and USB HS-peripheral are enabled - enough for the
initramfs + USB networking. cmdline: console=ttyMSM0 (no earlycon).

Co-Authored-By: Claude Sonnet 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_01QF5HebjUsRaxbW4cBX6HJP
This commit is contained in:
2026-09-09 00:35:59 -03:00
co-authored by Claude Sonnet 5
parent 988dd10251
commit 35df152310
4 changed files with 119 additions and 223 deletions
+2 -2
View File
@@ -2,7 +2,7 @@
maintainer="snlavaise <snlavaise@gmail.com>"
pkgname=device-motorola-rtwo
pkgver=1
pkgrel=10
pkgrel=11
pkgdesc="Motorola Moto Edge 40 Pro"
url="https://postmarketos.org"
arch="aarch64"
@@ -36,6 +36,6 @@ package() {
}
sha512sums="
a4effea052cb41df51212f5f7b3ba480f6bfafcdf2c2fd0ea8ddeb446f0b6e016b68a33ec746dd5881ef3f9f1d811d0b288bb9b0b429dd9f4a951dff68ba5d95 deviceinfo
1493ab4b2572a0245a189d3c8e1a53130cad87d999eb20e6d674d6aea4530b527f3478491ff1247adbd78b84e38eb3c7f404cafad1640726eeb21983aed613c6 deviceinfo
c572e21cb0624b554a22a218b0c4faab9b6412654bed6bfef530f3068d076b21c573bd7f4b3ca65f510f8756f636a861191cce925ef49587db7d68d09558826c modules-initfs
"
@@ -32,7 +32,7 @@ deviceinfo_create_initfs_extra="true"
deviceinfo_flash_method="fastboot"
deviceinfo_flash_fastboot_partition_dtbo="dtbo"
deviceinfo_flash_fastboot_partition_vbmeta="vbmeta"
deviceinfo_kernel_cmdline="console=tty0 ignore_loglevel"
deviceinfo_kernel_cmdline="console=ttyMSM0,115200n8 ignore_loglevel"
deviceinfo_generate_bootimg="true"
# The Motorola bootloader places the DTB / kernel at the addresses in the
# vendor_boot header. mkbootimg defaults to base 0x10000000 (dtb ends up at
@@ -5,7 +5,7 @@ maintainer="snlavaise <snlavaise@gmail.com>"
_flavor="postmarketos-qcom-sm8550"
pkgname=linux-$_flavor
pkgver=7.2
pkgrel=7
pkgrel=8
pkgdesc="Mainline kernel for Qualcomm SM8550 (Snapdragon 8 Gen 2) + Motorola rtwo"
arch="aarch64"
_carch="arm64"
@@ -120,5 +120,5 @@ sha512sums="
52d5aa7f94f6aa6141debf4ceb4fc7a2e75505a7cd38b8854e501be83c2b57863020f463f2fdb2fc93667e6cfe13274d077e5207a611e4797bd9404ee0e64c58 linux-postmarketos-qcom-sm8550-7.2.tar.gz
f9ae52489f6b9e6fef64952943cd09732a5bef90a0e8765db03c256483028368687d6d5a1d80dd813a513e7e80d91f8b47f49b91cff67266b76f1d6275a7fea0 config-motorola-rtwo.aarch64
53441c23146d76bb0eaa358a25f6cce4f21740cfb65b755df52bbb218daf2cda30b3d80fa6ca4e283ea1afe2b0fa708307b678b421898100710b8fb99b08d6c5 rtwo.config
43f5147f474ad4fbbc926e21b1305991b04c88bac869c684aee6fa4bb548663c4079d4d389a002ed3502af746566cf8fc31261221825c8f3c6b3949fc36c518d sm8550-motorola-rtwo.dts
7399bf2dccbc1584258ea0f3fc19b062d26b4cef94f54cc5b36c8a139115d29c9e3459092fbd9fb7a1008173c7974516058b70b05fba48cf9d43dff8cda4507b sm8550-motorola-rtwo.dts
"
@@ -2,13 +2,15 @@
/*
* Motorola Moto Edge 40 Pro (codename "rtwo"), SM8550 / Snapdragon 8 Gen 2
*
* MINIMAL bring-up device tree: SoC + PMIC regulators + debug UART + USB
* (high-speed peripheral). No reserved-memory, no framebuffer, no touch,
* no SD/UFS, no keys - everything that could fault early is stripped.
*
* If this reaches the initramfs (USB net / telnet works), the problem was
* in the removed nodes; add them back one at a time. If this also resets
* in <2s, the problem is the kernel/config/boot image, not the .dts.
* MINIMAL bring-up DT, modelled on the mainline Sony Xperia 1 V
* (sm8550-sony-xperia-yodo-pdx234, same SoC, working mainline port):
* - no /memory, no qcom,msm-id, no reserved-memory overrides, no
* framebuffer - exactly like Sony (its Qualcomm bootloader injects
* memory and passes the DT straight through)
* - regulator tree copied VERBATIM from Sony, including the rails it
* deliberately omits ("the board seems to crash on access")
* - only the debug UART and USB (high-speed peripheral) are enabled,
* enough to reach the initramfs and bring up USB networking
*/
/dts-v1/;
@@ -28,77 +30,12 @@
compatible = "motorola,rtwo", "qcom,sm8550";
chassis-type = "handset";
/*
* The Motorola bootloader (Qualcomm LK/ABL) selects the DTB by matching
* qcom,msm-id / qcom,board-id against the detected SoC + board. Without a
* match it passes no DTB and the kernel panics instantly with no console.
* Values from the DT the stock firmware hands to its own kernel; ignored
* by mainline.
*/
qcom,msm-id = <0x218 0x20000>, <0x207 0x20000>,
<0x207 0x10000>, <0x218 0x10000>;
qcom,board-id = <0x241 0xb1b0>;
aliases {
serial0 = &uart7;
};
/*
* The mainline kernel needs a /memory node. Android normally has the
* bootloader inject one; if the Motorola ABL does not do that for our
* DTB, the kernel panics before the console comes up (black screen,
* <2s reset). Bank layout copied verbatim from the DT the stock
* firmware runs (a zero-size bank was dropped).
*/
memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x00e00000>,
<0x0 0x811d0000 0x0 0x56e30000>,
<0x0 0xd8140000 0x0 0x00020000>,
<0x0 0xe1bb0000 0x0 0x1e450000>,
<0x8 0x80000000 0x0 0x39d00000>,
<0x8 0xb9f00000 0x0 0x01e00000>,
<0x8 0xc0000000 0x0 0xc0000000>,
<0x9 0x80000000 0x1 0x80000000>;
};
chosen {
/* Keep this minimal - the Motorola bootloader patches
* /memory, bootargs and initrd pointers in here. */
};
/*
* Bootloader continuous-splash framebuffer, reused as a console
* (CONFIG_FB_SIMPLE). No panel driver needed. Geometry is a guess
* (1080x2400, 32bpp) from the stock cont_splash region: garbled =
* wrong format/stride, black = the kernel dies before this probes.
*/
framebuffer0: framebuffer@b8000000 {
compatible = "simple-framebuffer";
reg = <0x0 0xb8000000 0x0 (1080 * 2400 * 4)>;
width = <1080>;
height = <2400>;
stride = <(1080 * 4)>;
format = "a8r8g8b8";
};
reserved-memory {
/*
* Match the stock ramoops layout exactly so a pmOS panic can be
* read back from stock Android via /sys/fs/pstore/console-ramoops-0.
*/
ramoops@ae000000 {
compatible = "ramoops";
reg = <0x0 0xae000000 0x0 0x60000>;
console-size = <0x40000>;
record-size = <0x20000>;
no-map;
};
cont_splash_mem: cont-splash@b8000000 {
reg = <0x0 0xb8000000 0x0 0x2b00000>;
no-map;
};
stdout-path = "serial0:115200n8";
};
vph_pwr: vph-pwr-regulator {
@@ -113,145 +50,121 @@
};
&apps_rsc {
/*
* PM8550-family RPMh regulators. Rail voltage ranges are the SM8550
* reference-design values, which the rtwo downstream DT shares; the
* few board-specific ranges (L11B panel, L1E, L1G) and the consumer
* wiring (touch, SD, panel, UFS) come from the Motorola downstream DT
* and the DTB dumped from the device.
*/
regulators-0 {
compatible = "qcom,pm8550-rpmh-regulators";
qcom,pmic-id = "b";
vdd-bob1-supply = <&vph_pwr>;
vdd-bob2-supply = <&vph_pwr>;
vdd-l1-l4-l10-supply = <&vreg_s6g_1p8>;
vdd-l2-l13-l14-supply = <&vreg_bob1>;
vdd-l3-supply = <&vreg_s4g_1p3>;
vdd-l5-l16-supply = <&vreg_bob1>;
vdd-l6-l7-supply = <&vreg_bob1>;
vdd-l8-l9-supply = <&vreg_bob1>;
vdd-l11-supply = <&vreg_s4g_1p3>;
vdd-l12-supply = <&vreg_s6g_1p8>;
vdd-l15-supply = <&vreg_s6g_1p8>;
vdd-l17-supply = <&vreg_bob2>;
vreg_bob1: bob1 {
regulator-name = "vreg_bob1";
regulator-min-microvolt = <3296000>;
pm8550_bob1: bob1 {
regulator-name = "pm8550_bob1";
regulator-min-microvolt = <3416000>;
regulator-max-microvolt = <3960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_bob2: bob2 {
regulator-name = "vreg_bob2";
regulator-min-microvolt = <2720000>;
regulator-max-microvolt = <3960000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
/* TODO: bob2 @ 2.704-3.008V doesn't fall into the vreg driver constraints */
vreg_l1b_1p8: ldo1 {
regulator-name = "vreg_l1b_1p8";
pm8550_l1: ldo1 {
regulator-name = "pm8550_l1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2b_3p0: ldo2 {
regulator-name = "vreg_l2b_3p0";
pm8550_l2: ldo2 {
regulator-name = "pm8550_l2";
regulator-min-microvolt = <3008000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l5b_3p1: ldo5 {
regulator-name = "vreg_l5b_3p1";
/* L4 exists in cmd-db, but the board seems to crash on access */
pm8550_l5: ldo5 {
regulator-name = "pm8550_l5";
regulator-min-microvolt = <3104000>;
regulator-max-microvolt = <3104000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l6b_1p8: ldo6 {
regulator-name = "vreg_l6b_1p8";
pm8550_l6: ldo6 {
regulator-name = "pm8550_l6";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l7b_1p8: ldo7 {
regulator-name = "vreg_l7b_1p8";
pm8550_l7: ldo7 {
regulator-name = "pm8550_l7";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l8b_1p8: ldo8 {
regulator-name = "vreg_l8b_1p8";
pm8550_l8: ldo8 {
regulator-name = "pm8550_l8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l9b_2p9: ldo9 {
regulator-name = "vreg_l9b_2p9";
pm8550_l9: ldo9 {
regulator-name = "pm8550_l9";
regulator-min-microvolt = <2960000>;
regulator-max-microvolt = <3008000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l10b_1p8: ldo10 {
regulator-name = "vreg_l10b_1p8";
pm8550_l10: ldo10 {
regulator-name = "pm8550_l10";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
/* panel VDD (Novatek NT37705) - board-specific range from downstream */
vreg_l11b_1p2: ldo11 {
regulator-name = "vreg_l11b_1p2";
regulator-min-microvolt = <1230000>;
regulator-max-microvolt = <1280000>;
pm8550_l11: ldo11 {
regulator-name = "pm8550_l11";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l12b_1p8: ldo12 {
regulator-name = "vreg_l12b_1p8";
pm8550_l12: ldo12 {
regulator-name = "pm8550_l12";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l13b_3p0: ldo13 {
regulator-name = "vreg_l13b_3p0";
pm8550_l13: ldo13 {
regulator-name = "pm8550_l13";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l14b_3p2: ldo14 {
regulator-name = "vreg_l14b_3p2";
regulator-min-microvolt = <3200000>;
regulator-max-microvolt = <3200000>;
pm8550_l14: ldo14 {
regulator-name = "pm8550_l14";
regulator-min-microvolt = <3304000>;
regulator-max-microvolt = <3304000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l15b_1p8: ldo15 {
regulator-name = "vreg_l15b_1p8";
pm8550_l15: ldo15 {
regulator-name = "pm8550_l15";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l16b_2p8: ldo16 {
regulator-name = "vreg_l16b_2p8";
pm8550_l16: ldo16 {
regulator-name = "pm8550_l16";
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l17b_2p5: ldo17 {
regulator-name = "vreg_l17b_2p5";
pm8550_l17: ldo17 {
regulator-name = "pm8550_l17";
regulator-min-microvolt = <2504000>;
regulator-max-microvolt = <2504000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -262,10 +175,15 @@
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "c";
vdd-l3-supply = <&vreg_s4e_0p9>;
pm8550vs_0_l1: ldo1 {
regulator-name = "pm8550vs_0_l1";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3c_0p91: ldo3 {
regulator-name = "vreg_l3c_0p9";
pm8550vs_0_l3: ldo3 {
regulator-name = "pm8550vs_0_l3";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -276,56 +194,50 @@
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "d";
vdd-l1-supply = <&vreg_s4e_0p9>;
vreg_l1d_0p88: ldo1 {
regulator-name = "vreg_l1d_0p88";
pm8550vs_1_l1: ldo1 {
regulator-name = "pm8550vs_1_l1";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <920000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
/* L3 exists in cmd-db, but the board seems to crash on access */
};
regulators-3 {
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "e";
vdd-l1-supply = <&vreg_s4e_0p9>;
vdd-l2-supply = <&vreg_s4e_0p9>;
vdd-l3-supply = <&vreg_s4g_1p3>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vreg_s4e_0p9: smps4 {
regulator-name = "vreg_s4e_0p9";
pm8550vs_2_s4: smps4 {
regulator-name = "pm8550vs_2_s4";
regulator-min-microvolt = <904000>;
regulator-max-microvolt = <984000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s5e_1p1: smps5 {
regulator-name = "vreg_s5e_1p1";
regulator-min-microvolt = <1080000>;
pm8550vs_2_s5: smps5 {
regulator-name = "pm8550vs_2_s5";
regulator-min-microvolt = <1010000>;
regulator-max-microvolt = <1120000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l1e_0p88: ldo1 {
regulator-name = "vreg_l1e_0p88";
pm8550vs_2_l1: ldo1 {
regulator-name = "pm8550vs_2_l1";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2e_0p9: ldo2 {
regulator-name = "vreg_l2e_0p9";
regulator-min-microvolt = <904000>;
regulator-max-microvolt = <970000>;
pm8550vs_2_l2: ldo2 {
regulator-name = "pm8550vs_2_l2";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <968000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3e_1p2: ldo3 {
regulator-name = "vreg_l3e_1p2";
pm8550vs_2_l3: ldo3 {
regulator-name = "pm8550vs_2_l3";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
@@ -336,35 +248,30 @@
compatible = "qcom,pm8550ve-rpmh-regulators";
qcom,pmic-id = "f";
vdd-l1-supply = <&vreg_s4e_0p9>;
vdd-l2-supply = <&vreg_s4e_0p9>;
vdd-l3-supply = <&vreg_s4e_0p9>;
vdd-s4-supply = <&vph_pwr>;
vreg_s4f_0p5: smps4 {
regulator-name = "vreg_s4f_0p5";
pm8550ve_s4: smps4 {
regulator-name = "pm8550ve_s4";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <700000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l1f_0p9: ldo1 {
regulator-name = "vreg_l1f_0p9";
pm8550ve_l1: ldo1 {
regulator-name = "pm8550ve_l1";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2f_0p88: ldo2 {
regulator-name = "vreg_l2f_0p88";
pm8550ve_l2: ldo2 {
regulator-name = "pm8550ve_l2";
regulator-min-microvolt = <880000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3f_0p91: ldo3 {
regulator-name = "vreg_l3f_0p91";
regulator-min-microvolt = <880000>;
pm8550ve_l3: ldo3 {
regulator-name = "pm8550ve_l3";
regulator-min-microvolt = <912000>;
regulator-max-microvolt = <912000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
@@ -374,85 +281,77 @@
compatible = "qcom,pm8550vs-rpmh-regulators";
qcom,pmic-id = "g";
vdd-l1-supply = <&vreg_s4g_1p3>;
vdd-l2-supply = <&vreg_s4g_1p3>;
vdd-l3-supply = <&vreg_s4g_1p3>;
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-s6-supply = <&vph_pwr>;
vreg_s1g_1p2: smps1 {
regulator-name = "vreg_s1g_1p2";
pm8550vs_3_s1: smps1 {
regulator-name = "pm8550vs_3_s1";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1300000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s2g_0p8: smps2 {
regulator-name = "vreg_s2g_0p8";
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1000000>;
pm8550vs_3_s2: smps2 {
regulator-name = "pm8550vs_3_s2";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1036000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s3g_0p7: smps3 {
regulator-name = "vreg_s3g_0p7";
pm8550vs_3_s3: smps3 {
regulator-name = "pm8550vs_3_s3";
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1004000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s4g_1p3: smps4 {
regulator-name = "vreg_s4g_1p3";
pm8550vs_3_s4: smps4 {
regulator-name = "pm8550vs_3_s4";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1352000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s5g_0p8: smps5 {
regulator-name = "vreg_s5g_0p8";
pm8550vs_3_s5: smps5 {
regulator-name = "pm8550vs_3_s5";
regulator-min-microvolt = <500000>;
regulator-max-microvolt = <1004000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_s6g_1p8: smps6 {
regulator-name = "vreg_s6g_1p8";
pm8550vs_3_s6: smps6 {
regulator-name = "pm8550vs_3_s6";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2000000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
/* UFS VCCQ - board-specific range from downstream */
vreg_l1g_1p2: ldo1 {
regulator-name = "vreg_l1g_1p2";
pm8550vs_3_l1: ldo1 {
regulator-name = "pm8550vs_3_l1";
regulator-min-microvolt = <1144000>;
regulator-max-microvolt = <1256000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l2g_1p2: ldo2 {
regulator-name = "vreg_l2g_1p2";
regulator-min-microvolt = <1200000>;
pm8550vs_3_l2: ldo2 {
regulator-name = "pm8550vs_3_l2";
regulator-min-microvolt = <1104000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
vreg_l3g_1p2: ldo3 {
regulator-name = "vreg_l3g_1p2";
pm8550vs_3_l3: ldo3 {
regulator-name = "pm8550vs_3_l3";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
};
};
/* TODO: Unknown PMIC @ k, l, PM8010 @ m, n */
};
&pm8550b_eusb2_repeater {
vdd18-supply = <&vreg_l15b_1p8>;
vdd3-supply = <&vreg_l5b_3p1>;
vdd18-supply = <&pm8550_l15>;
vdd3-supply = <&pm8550_l5>;
};
/* GENI QUP0 wrapper: hosts the debug UART (SE7) */
@@ -460,16 +359,13 @@
status = "okay";
};
&sleep_clk {
clock-frequency = <32000>;
};
&uart7 {
status = "okay";
};
&usb_1 {
/* high-speed peripheral only, no type-C / SuperSpeed */
/* plain high-speed peripheral for the initramfs USB network - no
* type-C / pmic-glink / SuperSpeed */
dr_mode = "peripheral";
maximum-speed = "high-speed";
/delete-property/ usb-role-switch;
@@ -481,8 +377,8 @@
};
&usb_1_hsphy {
vdd-supply = <&vreg_l1e_0p88>;
vdda12-supply = <&vreg_l3e_1p2>;
vdd-supply = <&pm8550vs_2_l1>;
vdda12-supply = <&pm8550vs_2_l3>;
phys = <&pm8550b_eusb2_repeater>;
status = "okay";
};