Oliver Smith
1f18c9a29e
Part-of: <https://gitlab.postmarketos.org/postmarketOS/pmaports/-/merge_requests/7289>
131 lines
3.9 KiB
Diff
131 lines
3.9 KiB
Diff
From 824eae920f0f64dd7687c969a2436b129161fdc9 Mon Sep 17 00:00:00 2001
|
|
From: Jinyang He <hejinyang@loongson.cn>
|
|
Date: Wed, 29 Oct 2025 16:07:35 +0800
|
|
Subject: [PATCH] LoongArch: Only allow valid binary op when optimize
|
|
conditional move
|
|
|
|
It is wrong that optimize from `if (cond) dest op= 1 << shift` to
|
|
`dest op= (cond ? 1 : 0) << shift` when `dest op 0 != dest`.
|
|
Like `and`, `mul` or `div`.
|
|
And in this optimization `mul` and `div` is optimized to shift.
|
|
|
|
gcc/ChangeLog:
|
|
|
|
* config/loongarch/loongarch.cc
|
|
(loongarch_expand_conditional_move): Only allow valid binary
|
|
op when optimize conditional move.
|
|
|
|
gcc/testsuite/ChangeLog:
|
|
|
|
* gcc.target/loongarch/conditional-move-opt-1.c: Remove mul.
|
|
* gcc.target/loongarch/conditional-move-opt-2.c: Remove and.
|
|
* gcc.target/loongarch/conditional-move-opt-3.c: New test.
|
|
|
|
Co-Authored-By: Peng Fan <fanpeng@loongson.cn>
|
|
---
|
|
gcc/config/loongarch/loongarch.cc | 26 ++++++++++++++++---
|
|
.../loongarch/conditional-move-opt-1.c | 4 +--
|
|
.../loongarch/conditional-move-opt-2.c | 2 +-
|
|
.../loongarch/conditional-move-opt-3.c | 14 ++++++++++
|
|
4 files changed, 40 insertions(+), 6 deletions(-)
|
|
create mode 100644 gcc/testsuite/gcc.target/loongarch/conditional-move-opt-3.c
|
|
|
|
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
|
|
index bdf290654..740c8611a 100644
|
|
--- a/gcc/config/loongarch/loongarch.cc
|
|
+++ b/gcc/config/loongarch/loongarch.cc
|
|
@@ -5533,12 +5533,32 @@ loongarch_expand_conditional_move (rtx *operands)
|
|
}
|
|
}
|
|
|
|
+ auto is_binary_op_0_keep_orig = [](enum rtx_code code)
|
|
+ {
|
|
+ switch (code)
|
|
+ {
|
|
+ case PLUS:
|
|
+ case MINUS:
|
|
+ case IOR:
|
|
+ case XOR:
|
|
+ case ROTATE:
|
|
+ case ROTATERT:
|
|
+ case ASHIFT:
|
|
+ case ASHIFTRT:
|
|
+ case LSHIFTRT:
|
|
+ return true;
|
|
+ default:
|
|
+ return false;
|
|
+ }
|
|
+ };
|
|
+
|
|
/* Check if the optimization conditions are met. */
|
|
if (value_if_true_insn
|
|
&& value_if_false_insn
|
|
- /* Make sure that value_if_false and var are the same. */
|
|
- && BINARY_P (value_if_true_insn_src
|
|
- = SET_SRC (single_set (value_if_true_insn)))
|
|
+ /* Make sure that the orig value OP 0 keep orig. */
|
|
+ && (value_if_true_insn_src
|
|
+ = SET_SRC (single_set (value_if_true_insn)))
|
|
+ && is_binary_op_0_keep_orig ( GET_CODE (value_if_true_insn_src))
|
|
/* Make sure that both value_if_true and value_if_false
|
|
has the same var. */
|
|
&& rtx_equal_p (XEXP (value_if_true_insn_src, 0),
|
|
diff --git a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c
|
|
index ed13471aa..47802aa96 100644
|
|
--- a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c
|
|
+++ b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-1.c
|
|
@@ -27,7 +27,7 @@ void
|
|
test_lt ()
|
|
{
|
|
if (lm < ln)
|
|
- lr *= (1 << 16);
|
|
+ lr += (1 << 16);
|
|
lr += lm;
|
|
}
|
|
|
|
@@ -35,7 +35,7 @@ void
|
|
test_le ()
|
|
{
|
|
if (lm <= ln)
|
|
- lr = lm * ((long)1 << 32);
|
|
+ lr = lm + ((long)1 << 32);
|
|
else
|
|
lr = lm;
|
|
lr += lm;
|
|
diff --git a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c
|
|
index ac72d4d93..743fd5e67 100644
|
|
--- a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c
|
|
+++ b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-2.c
|
|
@@ -29,7 +29,7 @@ void
|
|
test_lez ()
|
|
{
|
|
if (lm <= 0)
|
|
- lr &= (1 << 16);
|
|
+ lr |= (1 << 16);
|
|
lr += lm;
|
|
}
|
|
|
|
diff --git a/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-3.c b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-3.c
|
|
new file mode 100644
|
|
index 000000000..95887980c
|
|
--- /dev/null
|
|
+++ b/gcc/testsuite/gcc.target/loongarch/conditional-move-opt-3.c
|
|
@@ -0,0 +1,14 @@
|
|
+/* { dg-do compile } */
|
|
+/* { dg-options "-O2" } */
|
|
+/* { dg-final { scan-assembler "maskeqz" } } */
|
|
+/* { dg-final { scan-assembler "masknez" } } */
|
|
+
|
|
+extern long lm, ln, lr;
|
|
+
|
|
+void
|
|
+test_and ()
|
|
+{
|
|
+ if (lm < 0)
|
|
+ lr &= (1 << 16);
|
|
+ lr += lm;
|
|
+}
|
|
--
|
|
2.51.1
|
|
|