Signed-off-by: Rudraksha Gupta <guptarud@gmail.com> Part-of: <https://gitlab.postmarketos.org/postmarketOS/pmaports/-/merge_requests/9440>
164 lines
5.8 KiB
Diff
164 lines
5.8 KiB
Diff
From 1f8ae7f533822f0195a942b255bb5107b414a615 Mon Sep 17 00:00:00 2001
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From: Ondrej Jirman <megi@xff.cz>
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Date: Fri, 21 Jun 2024 01:42:38 +0200
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Subject: [PATCH 62/90] phy: rockchip-inno-usb2: Add support for RV1106/RV1103
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Ported from BSP driver.
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Signed-off-by: Ondrej Jirman <megi@xff.cz>
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---
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 102 ++++++++++++++++++
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1 file changed, 102 insertions(+)
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diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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index 7d8a533f24ae..7831e2993b9f 100644
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -143,6 +143,7 @@ struct rockchip_usb2phy_port_cfg {
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struct usb2phy_reg bvalid_det_en;
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struct usb2phy_reg bvalid_det_st;
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struct usb2phy_reg bvalid_det_clr;
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+ struct usb2phy_reg bvalid_grf_sel;
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struct usb2phy_reg disfall_en;
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struct usb2phy_reg disfall_st;
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struct usb2phy_reg disfall_clr;
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@@ -1291,6 +1292,7 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
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struct rockchip_usb2phy_port *rport,
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struct device_node *child_np)
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{
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+ struct regmap *base = rphy->grf;
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int ret, id;
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rport->port_id = USB2PHY_PORT_OTG;
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@@ -1324,6 +1326,23 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
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goto out;
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}
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+ /*
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+ * Set the utmi bvalid come from the usb phy or grf.
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+ * For most of Rockchip SoCs, them have VBUSDET pin
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+ * for the usb phy to detect the USB VBUS and set
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+ * the bvalid signal, so select the bvalid from the
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+ * usb phy by default. And for those SoCs which don't
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+ * have VBUSDET pin (e.g. RV1103), it needs to select
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+ * the bvaid from the grf and set bvalid to be valid
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+ * (high) by default.
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+ */
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+ if (rport->port_cfg->bvalid_grf_sel.enable != 0) {
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+ if (of_machine_is_compatible("rockchip,rv1103"))
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+ property_enable(base, &rport->port_cfg->bvalid_grf_sel, true);
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+ else
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+ property_enable(base, &rport->port_cfg->bvalid_grf_sel, false);
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+ }
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+
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if (!IS_ERR(rphy->edev)) {
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rport->event_nb.notifier_call = rockchip_otg_event;
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@@ -1504,6 +1523,40 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
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return ret;
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}
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+static int rv1106_usb2phy_tuning(struct rockchip_usb2phy *rphy)
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+{
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+ int ret = 0;
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+
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+ /* Always enable pre-emphasis in SOF & EOP & chirp & non-chirp state */
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+ ret |= regmap_update_bits(rphy->phy_base, 0x30, GENMASK(2, 0), 0x07);
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+
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+// if (rockchip_get_cpu_version()) {
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+// /* Set Tx HS pre_emphasize strength to 3'b001 */
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+// ret |= regmap_update_bits(rphy->phy_base, 0x40, GENMASK(5, 3), (0x01 << 3));
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+// } else {
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+ /* Set Tx HS pre_emphasize strength to 3'b011 */
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+ ret |= regmap_update_bits(rphy->phy_base, 0x40, GENMASK(5, 3), (0x03 << 3));
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+// }
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+
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+ /* Set RX Squelch trigger point configure to 4'b0000(112.5 mV) */
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+ ret |= regmap_update_bits(rphy->phy_base, 0x64, GENMASK(6, 3), (0x00 << 3));
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+
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+ /* Turn off differential receiver by default to save power */
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+ ret |= regmap_clear_bits(rphy->phy_base, 0x100, BIT(6));
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+
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+ /* Set 45ohm HS ODT value to 5'b10111 to increase driver strength */
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+ ret |= regmap_update_bits(rphy->phy_base, 0x11c, GENMASK(4, 0), 0x17);
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+
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+ /* Set Tx HS eye height tuning to 3'b011(462 mV)*/
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+ ret |= regmap_update_bits(rphy->phy_base, 0x124, GENMASK(4, 2), (0x03 << 2));
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+
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+ /* Bypass Squelch detector calibration */
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+ ret |= regmap_update_bits(rphy->phy_base, 0x1a4, GENMASK(7, 4), (0x01 << 4));
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+ ret |= regmap_update_bits(rphy->phy_base, 0x1b4, GENMASK(7, 4), (0x01 << 4));
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+
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+ return ret;
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+}
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+
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static int rk3128_usb2phy_tuning(struct rockchip_usb2phy *rphy)
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{
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/* Turn off differential receiver in suspend mode */
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@@ -2324,6 +2377,54 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = {
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{ /* sentinel */ }
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};
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+static const struct rockchip_usb2phy_cfg rv1106_phy_cfgs[] = {
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+ {
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+ .reg = 0xff3e0000,
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+ .num_ports = 1,
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+ .phy_tuning = rv1106_usb2phy_tuning,
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+ .clkout_ctl = { 0x0058, 4, 4, 1, 0 },
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+ .port_cfgs = {
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+ [USB2PHY_PORT_OTG] = {
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+ .phy_sus = { 0x0050, 8, 0, 0, 0x1d1 },
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+ .bvalid_det_en = { 0x0100, 2, 2, 0, 1 },
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+ .bvalid_det_st = { 0x0104, 2, 2, 0, 1 },
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+ .bvalid_det_clr = { 0x0108, 2, 2, 0, 1 },
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+ .bvalid_grf_sel = { 0x0058, 15, 14, 0, 3 },
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+ /*
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+ .iddig_output = { 0x0050, 10, 10, 0, 1 },
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+ .iddig_en = { 0x0050, 9, 9, 0, 1 },
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+ */
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+ .idfall_det_en = { 0x0100, 5, 5, 0, 1 },
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+ .idfall_det_st = { 0x0104, 5, 5, 0, 1 },
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+ .idfall_det_clr = { 0x0108, 5, 5, 0, 1 },
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+ .idrise_det_en = { 0x0100, 4, 4, 0, 1 },
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+ .idrise_det_st = { 0x0104, 4, 4, 0, 1 },
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+ .idrise_det_clr = { 0x0108, 4, 4, 0, 1 },
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+ .ls_det_en = { 0x0100, 0, 0, 0, 1 },
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+ .ls_det_st = { 0x0104, 0, 0, 0, 1 },
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+ .ls_det_clr = { 0x0108, 0, 0, 0, 1 },
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+ .utmi_avalid = { 0x0060, 10, 10, 0, 1 },
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+ .utmi_bvalid = { 0x0060, 9, 9, 0, 1 },
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+ //.utmi_iddig = { 0x0060, 6, 6, 0, 1 },
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+ .utmi_ls = { 0x0060, 5, 4, 0, 1 },
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+ },
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+ },
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+ .chg_det = {
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+ //.chg_mode = { 0x0050, 8, 0, 0, 0x1d7 },
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+ .cp_det = { 0x0060, 13, 13, 0, 1 },
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+ .dcp_det = { 0x0060, 12, 12, 0, 1 },
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+ .dp_det = { 0x0060, 14, 14, 0, 1 },
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+ .idm_sink_en = { 0x0058, 8, 8, 0, 1 },
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+ .idp_sink_en = { 0x0058, 7, 7, 0, 1 },
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+ .idp_src_en = { 0x0058, 9, 9, 0, 1 },
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+ .rdm_pdwn_en = { 0x0058, 10, 10, 0, 1 },
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+ .vdm_src_en = { 0x0058, 12, 12, 0, 1 },
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+ .vdp_src_en = { 0x0058, 11, 11, 0, 1 },
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+ },
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+ },
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+ { /* sentinel */ }
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+};
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+
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static const struct rockchip_usb2phy_cfg rv1108_phy_cfgs[] = {
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{
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.reg = 0x100,
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@@ -2381,6 +2482,7 @@ static const struct of_device_id rockchip_usb2phy_dt_match[] = {
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{ .compatible = "rockchip,rk3576-usb2phy", .data = &rk3576_phy_cfgs },
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{ .compatible = "rockchip,rk3588-usb2phy", .data = &rk3588_phy_cfgs },
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{ .compatible = "rockchip,rv1108-usb2phy", .data = &rv1108_phy_cfgs },
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+ { .compatible = "rockchip,rv1106-usb2phy", .data = &rv1106_phy_cfgs },
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{}
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};
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MODULE_DEVICE_TABLE(of, rockchip_usb2phy_dt_match);
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--
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2.55.0
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