snlavaiseandClaude Opus 5.5
8a87204d48
Bring-up of the Moto Edge 40 Pro (rtwo) on the SM8550 kernel: - dts: NT37705 DSI panel with DSC, Goodix GT9916P touch, ADSP/CDSP with pmic-glink (battery, UCSI), Adreno 740, WiFi (WCN7850/ath12k), physical keys, and USB-C DisplayPort (pmic-glink altmode -> PS5169 redriver -> FSA4480 -> QMP combo PHY -> mdss_dp0) following the sm8550-qrd layout. - DP link capped at HBR (link-frequencies on &mdss_dp0_out): the DP->HDMI converter of a common USB-C hub trains fine at HBR2 but its HDMI output flickers and drops HPD; HBR x2 still covers 1080p60. - new drivers: typec-mux-ps5169.c (Parade PS5169 redriver as typec switch/retimer), panel-novatek-nt37705.c. - patches: msm DP invalid LTTPR caps + no push_idle with the link down (hardware reset on unplug), msm DSI keeps the panel DSC config, ath12k regd fixes and MHI keep-awake, ICC keepalive for the MDP fetch path. - rtwo.config / config-motorola-rtwo.aarch64: options for all of the above. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01DnHwDU5yL8L6qgPEN5CV5m
19 lines
648 B
Diff
19 lines
648 B
Diff
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
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+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
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@@ -1870,6 +1870,15 @@
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{
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int ret;
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+ /*
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+ * Some panels (e.g. Novatek DDICs with fixed rate control tables in
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+ * the decoder) need the exact RC configuration the vendor encoder
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+ * used, not the one derived here from the generic DSC tables. Keep a
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+ * configuration the panel driver already filled in completely.
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+ */
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+ if (dsc->rc_model_size && dsc->slice_chunk_size && dsc->initial_dec_delay)
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+ return 0;
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+
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if (dsc->bits_per_pixel & 0xf) {
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DRM_DEV_ERROR(&msm_host->pdev->dev, "DSI does not support fractional bits_per_pixel\n");
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return -EINVAL;
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