73 lines
1.7 KiB
C
73 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
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* Swamil Jain <s-jain1@ti.com>
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*
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* based on the linux tidss_oldi.c, which is
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*
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* Copyright (C) 2024 - Texas Instruments Incorporated
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* Author: Aradhya Bhatia <a-bhatia1@ti.com>
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*/
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#ifndef __TIDSS_OLDI_H__
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#define __TIDSS_OLDI_H__
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#include <dm/ofnode.h>
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#include <dm/of_access.h>
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#include "tidss_drv.h"
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/* OLDI PORTS */
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#define OLDI_INPUT_PORT 0
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#define OLDI_OURPUT_PORT 1
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/* Control MMR Registers */
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/* Register offsets */
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#define OLDI_PD_CTRL 0x100
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#define OLDI_LB_CTRL 0x104
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/* Power control bits */
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#define OLDI_PWRDOWN_TX(n) BIT(n)
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/* LVDS Bandgap reference Enable/Disable */
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#define OLDI_PWRDN_BG BIT(8)
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/*
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* OLDI IO_CTRL register offsets. On AM654 the registers are found
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* from CTRL_MMR0, there the syscon regmap should map 0x14 bytes from
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* CTRLMMR0P1_OLDI_DAT0_IO_CTRL to CTRLMMR0P1_OLDI_CLK_IO_CTRL
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* register range.
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*/
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#define OLDI_DAT0_IO_CTRL 0x00
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#define OLDI_DAT1_IO_CTRL 0x04
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#define OLDI_DAT2_IO_CTRL 0x08
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#define OLDI_DAT3_IO_CTRL 0x0C
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#define OLDI_CLK_IO_CTRL 0x10
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/* Only for AM625 OLDI TX */
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#define OLDI_PD_CTRL 0x100
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#define OLDI_LB_CTRL 0x104
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#define OLDI_BANDGAP_PWR BIT(8)
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#define OLDI_PWRDN_TX BIT(8)
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#define OLDI0_PWRDN_TX BIT(0)
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#define OLDI1_PWRDN_TX BIT(1)
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struct tidss_oldi {
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struct udevice *dev;
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enum tidss_oldi_link_type link_type;
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u32 oldi_instance;
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u32 companion_instance;
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u32 parent_vp;
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struct clk *serial;
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struct regmap *io_ctrl;
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};
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int tidss_oldi_init(struct udevice *dev);
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void dss_oldi_tx_power(struct tidss_drv_priv *priv, bool power);
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#endif /* __TIDSS_OLDI_H__ */
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