22 lines
460 B
C
22 lines
460 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2024 NXP
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*/
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#ifndef __IMX93_QSB_H
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#define __IMX93_QSB_H
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#define CFG_SYS_UBOOT_BASE \
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(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
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#define CFG_SYS_INIT_RAM_ADDR 0x80000000
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#define CFG_SYS_INIT_RAM_SIZE 0x200000
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#define CFG_SYS_SDRAM_BASE 0x80000000
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#define PHYS_SDRAM 0x80000000
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#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
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#define WDOG_BASE_ADDR WDG3_BASE_ADDR
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#endif
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