linux-postmarketos-qcom-sc7180: upgrade to 6.18.40 and fix sleep

Enable the qcom inline crypto engine and backport a series to attach driver to gmu to fix sleep not working.

Part-of: <https://gitlab.postmarketos.org/postmarketOS/pmaports/-/merge_requests/9139>
This commit is contained in:
WeirdTreeThing
2026-08-14 00:21:10 +00:00
parent e8eec72596
commit 6eec82632c
7 changed files with 688 additions and 5 deletions
@@ -0,0 +1,90 @@
From ed1d2c27bbed780a51e1c53e01d25ffb6104f7ef Mon Sep 17 00:00:00 2001
From: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Date: Wed, 13 May 2026 02:22:56 +0530
Subject: [PATCH 1/5] drm/msm/adreno/a6xx: Mark cxpd device_link as stateless
Since the cxpd virtual device is a driverless device, it has no real
struct device_driver bound it the way a normal platform device does. So,
the managed lifecycle doesn't map cleanly onto it. Since the lifecycle of
this device_link is managed by the msm driver, pass DL_FLAG_STATELESS
together with the existing DL_FLAG_PM_RUNTIME flag.
This fix is required to avoid the below splat when a driver is attached to
the GMU:
[ 9.624509] WARNING: drivers/base/core.c:1383 at dvice_links_driver_bound+0x178/0x330, CPU#6: (udev-worker)/354e
[ 9.781167] pc : device_links_driver_bound+0x178/0x330
[ 9.786456] lr : device_links_driver_bound+0x158/0x330
[ 9.798622] sp : ffff8000827bb820
[ 9.802042] x29: ffff8000827bb820 x28: ffff000808915800 x27: 0000000000000044
[ 9.809573] x26: ffffb7caf3f983d0 x25: 0000000000000003 x24: ffffb7caf41645a0
[ 9.816920] x23: ffffb7caf3f982d8 x22: ffff000801239cb8 x21: ffff000801239c10
[ 9.816921] x20: ffff00080b3a8c00 x19: ffff000801239c98 x18: 00000000ffffffff
[ 9.816922] x17: 736d5b2073706f5f x16: ffffb7caf1eb5940 x15: ffff8001027bb3b7
[ 9.816922] x14: 0000000000000026 x13: ffff00080084c110 x12: 0000000000000000
[ 9.816923] x11: ffff0008004a5828 x10: ffff0008004a56d0 x9 : ffffb7caf2227870
[ 9.816924] x8 : ffff0008004a56f8 x7 : 0000000000000001 x6 : 0000000000001000ocket.
[ 9.816925] x5 : 00000000001a7fbf x4 : ffff0008004a56e8 x3 : ffff000801238cc8
[ 9.816926] x2 : ffffb7caf4164000 x1 : ffff000801239c10 x0 : 0000000000000000
[ 9.816927] Call trace:
[ 9.816927] device_links_driver_bound+0x178/0x330 (P)
[ 9.893492] driver_bound+0x7c/0xd0
[ 9.893493] really_probe+0x208/0x2a8
[ 9.893495] __driver_probe_device+0x88/0x170
[ 9.893496] driver_probe_device+0x44/0x178
[ 9.909639] __driver_attach+0x9c/0x1b8
[ 9.913592] bus_for_each_dev+0x7c/0xe8System Message Bus Socket.
[ 9.925839] driver_attach+0x2c/0x40
[ 9.929733] bus_add_driver+0xec/0x218
[ 9.933609] driver_register+0x68/0x138
[ 9.937555] __platform_driver_register+0x2c/0x40
[ 9.937556] adreno_gmu_register+0x2c/0x40 [msm]
[ 9.947141] adreno_register+0x3c/0x50 [msm]
[ 9.951544] msm_drm_register+0x50/0x78 [msm]for the API...
[ 9.962813] do_one_initcall+0x4c/0x3e0
[ 9.966975] do_init_module+0x60/0x280
[ 9.970849] load_module+0x1c70/0x1fa0
[ 9.974708] init_module_from_file+0xdc/0x100
[ 9.979188] __arm64_sys_finit_module+0x1c0/0x2e0
[ 9.984026] invoke_syscall+0x5c/0x120
[ 9.987882] el0_svc_common.constprop.0+0xd0/0xf8
[ 9.992715] do_el0_svc+0x28/0x40
[ 9.995243] qcom_q6v5_pas 6800000.remoteproc: Handover signaled, but it already happened
[ 9.996128] el0_svc+0x38/0x148
[ 10.007672] el0t_64_sync_handler+0xa0/0xe8
[ 10.011975] el0t_64_sync+0x198/0x1a0
Fixes: ead5d3e5eb37 ("drm/msm/a6xx: Vote for cx gdsc from gpu driver")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 21a3f9b0ab4c..329b27ed1ec5 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -1959,7 +1959,8 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
goto err_mmio;
}
- if (!device_link_add(gmu->dev, gmu->cxpd, DL_FLAG_PM_RUNTIME)) {
+ if (!device_link_add(gmu->dev, gmu->cxpd,
+ DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS)) {
ret = -ENODEV;
goto detach_cxpd;
}
@@ -2123,7 +2124,8 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
goto err_mmio;
}
- link = device_link_add(gmu->dev, gmu->cxpd, DL_FLAG_PM_RUNTIME);
+ link = device_link_add(gmu->dev, gmu->cxpd,
+ DL_FLAG_PM_RUNTIME | DL_FLAG_STATELESS);
if (!link) {
ret = -ENODEV;
goto detach_cxpd;
--
2.47.3
@@ -0,0 +1,84 @@
From ad94b21f5c289f46c652f8b756f56ff98d0d5a62 Mon Sep 17 00:00:00 2001
From: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Date: Wed, 13 May 2026 02:22:57 +0530
Subject: [PATCH 2/5] drm/msm: Centralize the standalone drm device check for
GPU
Replace msm_gpu_no_components() with msm_gpu_use_separate_drm_dev() and
move the platform-specific check for "amd,imageon" into the helper so the
policy is centralized and reused by both the core driver and adreno probe
path. No functional change intended.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 3 +--
drivers/gpu/drm/msm/msm_drv.c | 11 +++++++----
drivers/gpu/drm/msm/msm_drv.h | 2 +-
3 files changed, 9 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 28f744f3caf7..da95c16e01a9 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -269,8 +269,7 @@ static const struct component_ops a3xx_ops = {
static int adreno_probe(struct platform_device *pdev)
{
- if (of_device_is_compatible(pdev->dev.of_node, "amd,imageon") ||
- msm_gpu_no_components())
+ if (msm_gpu_use_separate_drm_dev(pdev))
return msm_gpu_probe(pdev, &a3xx_ops);
return component_add(&pdev->dev, &a3xx_ops);
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 94b32973cd6a..ff5347e5115f 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -61,9 +61,12 @@ module_param(separate_gpu_kms, bool, 0400);
DECLARE_FAULT_ATTR(fail_gem_alloc);
DECLARE_FAULT_ATTR(fail_gem_iova);
-bool msm_gpu_no_components(void)
+bool msm_gpu_use_separate_drm_dev(struct platform_device *pdev)
{
- return separate_gpu_kms;
+ if (!pdev)
+ return separate_gpu_kms;
+
+ return of_device_is_compatible(pdev->dev.of_node, "amd,imageon") || separate_gpu_kms;
}
static int msm_drm_uninit(struct device *dev, const struct component_ops *gpu_ops)
@@ -1023,7 +1026,7 @@ static int add_gpu_components(struct device *dev,
static int msm_drm_bind(struct device *dev)
{
return msm_drm_init(dev,
- msm_gpu_no_components() ?
+ msm_gpu_use_separate_drm_dev(NULL) ?
&msm_kms_driver :
&msm_driver,
NULL);
@@ -1062,7 +1065,7 @@ int msm_drv_probe(struct device *master_dev,
return ret;
}
- if (!msm_gpu_no_components()) {
+ if (!msm_gpu_use_separate_drm_dev(NULL)) {
ret = add_gpu_components(master_dev, &match);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 6d847d593f1a..6fcb696ceb7c 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -555,6 +555,6 @@ void msm_kms_shutdown(struct platform_device *pdev);
bool msm_disp_drv_should_bind(struct device *dev, bool dpu_driver);
-bool msm_gpu_no_components(void);
+bool msm_gpu_use_separate_drm_dev(struct platform_device *pdev);
#endif /* __MSM_DRV_H__ */
--
2.47.3
@@ -0,0 +1,44 @@
From ed3e56f0d565239c5e9133710e4a5b83a1553440 Mon Sep 17 00:00:00 2001
From: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Date: Wed, 13 May 2026 02:22:58 +0530
Subject: [PATCH 3/5] drm/msm/adreno: Fix invalid drvdata typecast in
adreno_remove()
adreno_remove() decides between component_del() and msm_gpu_remove()
based on platform_get_drvdata(pdev), interpreted as a struct
msm_drm_private *. That dereference is wrong because msm_gpu_init()
overwrites the GPU pdev's drvdata with adreno_smmu_priv pointer.
Fix this by using msm_gpu_use_separate_drm_dev() instead of relying on
drvdata.
Fixes: 643515a9cd09 ("drm/msm: rework binding of Imageon GPUs")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 8 +++-----
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index da95c16e01a9..2365dabd28bf 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -277,12 +277,10 @@ static int adreno_probe(struct platform_device *pdev)
static void adreno_remove(struct platform_device *pdev)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
-
- if (priv->kms_init)
- component_del(&pdev->dev, &a3xx_ops);
- else
+ if (msm_gpu_use_separate_drm_dev(pdev))
msm_gpu_remove(pdev, &a3xx_ops);
+ else
+ component_del(&pdev->dev, &a3xx_ops);
}
static void adreno_shutdown(struct platform_device *pdev)
--
2.47.3
@@ -0,0 +1,138 @@
From 8649a6c45a57a8c60a2ab6be8f02dcb1275592cf Mon Sep 17 00:00:00 2001
From: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Date: Wed, 13 May 2026 02:22:59 +0530
Subject: [PATCH 4/5] drm/msm: Always use component model for standalone GPU
When separate_gpu_kms=1 (or the device is compatible with "amd,imageon"),
msm_gpu_no_components() evaluates true and adreno_probe() bypasses the
component framework by calling msm_gpu_probe() directly. In this case,
we skip creating components and directly bind the GPU.
That shortcut makes it impossible to add a second sibling on the GPU
master without introducing ad-hoc plumbing. To prepare for adding the
GMU as a peer component on this master, turn the GPU pdev into both a
component master and the sole component of itself in this path. A follow
up patch will introduce GMU as a component device.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
---
drivers/gpu/drm/msm/adreno/adreno_device.c | 20 +++++++++----
drivers/gpu/drm/msm/msm_drv.c | 35 ++++++++++++++++++----
drivers/gpu/drm/msm/msm_drv.h | 6 ++--
3 files changed, 45 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 2365dabd28bf..1061d977875c 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -269,18 +269,26 @@ static const struct component_ops a3xx_ops = {
static int adreno_probe(struct platform_device *pdev)
{
- if (msm_gpu_use_separate_drm_dev(pdev))
- return msm_gpu_probe(pdev, &a3xx_ops);
+ int ret;
- return component_add(&pdev->dev, &a3xx_ops);
+ if (msm_gpu_use_separate_drm_dev(pdev)) {
+ ret = msm_gpu_probe(pdev);
+ if (ret)
+ return ret;
+ }
+
+ ret = component_add(&pdev->dev, &a3xx_ops);
+ if (ret && msm_gpu_use_separate_drm_dev(pdev))
+ msm_gpu_remove(pdev);
+
+ return ret;
}
static void adreno_remove(struct platform_device *pdev)
{
+ component_del(&pdev->dev, &a3xx_ops);
if (msm_gpu_use_separate_drm_dev(pdev))
- msm_gpu_remove(pdev, &a3xx_ops);
- else
- component_del(&pdev->dev, &a3xx_ops);
+ msm_gpu_remove(pdev);
}
static void adreno_shutdown(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index ff5347e5115f..6da8981fd897 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1085,10 +1085,25 @@ int msm_drv_probe(struct device *master_dev,
return 0;
}
-int msm_gpu_probe(struct platform_device *pdev,
- const struct component_ops *ops)
+static int msm_gpu_drm_bind(struct device *dev)
+{
+ return msm_drm_init(dev, &msm_gpu_driver, NULL);
+}
+
+static void msm_gpu_drm_unbind(struct device *dev)
+{
+ msm_drm_uninit(dev, NULL);
+}
+
+static const struct component_master_ops msm_gpu_drm_ops = {
+ .bind = msm_gpu_drm_bind,
+ .unbind = msm_gpu_drm_unbind,
+};
+
+int msm_gpu_probe(struct platform_device *pdev)
{
struct msm_drm_private *priv;
+ struct component_match *match = NULL;
int ret;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
@@ -1104,13 +1119,21 @@ int msm_gpu_probe(struct platform_device *pdev,
if (ret)
return ret;
- return msm_drm_init(&pdev->dev, &msm_gpu_driver, ops);
+ /*
+ * The GPU pdev acts as both the component master and the sole
+ * component (added by adreno_probe()). Future patches add the
+ * GMU node as a second component on this same master.
+ */
+ drm_of_component_match_add(&pdev->dev, &match,
+ component_compare_of, pdev->dev.of_node);
+
+ return component_master_add_with_match(&pdev->dev, &msm_gpu_drm_ops,
+ match);
}
-void msm_gpu_remove(struct platform_device *pdev,
- const struct component_ops *ops)
+void msm_gpu_remove(struct platform_device *pdev)
{
- msm_drm_uninit(&pdev->dev, ops);
+ component_master_del(&pdev->dev, &msm_gpu_drm_ops);
}
static int __init msm_drm_register(void)
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 6fcb696ceb7c..6264ff27496f 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -544,10 +544,8 @@ extern const struct component_master_ops msm_drm_ops;
int msm_kms_pm_prepare(struct device *dev);
void msm_kms_pm_complete(struct device *dev);
-int msm_gpu_probe(struct platform_device *pdev,
- const struct component_ops *ops);
-void msm_gpu_remove(struct platform_device *pdev,
- const struct component_ops *ops);
+int msm_gpu_probe(struct platform_device *pdev);
+void msm_gpu_remove(struct platform_device *pdev);
int msm_drv_probe(struct device *dev,
int (*kms_init)(struct drm_device *dev),
struct msm_kms *kms);
--
2.47.3
@@ -0,0 +1,313 @@
From 7f7eec66d6c2736f041bc647cdb2be8dca38af40 Mon Sep 17 00:00:00 2001
From: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Date: Wed, 13 May 2026 02:23:00 +0530
Subject: [PATCH 5/5] drm/msm: Attach a driver to the GMU
With the introduction of sync_state in the genpd framework, any consumer
device of GCC and GPUCC which is not bound to a driver will result in
bootup warnings like below:
[ 24.362666] gcc-kaanapali 100000.clock-controller: sync_state() pending due to 3d37000.gmu
[ 24.371210] gxclkctl-kaanapali 3d64000.clock-controller: sync_state() pending due to 3d37000.gmu
[ 24.380268] gpucc-kaanapali 3d90000.clock-controller: sync_state() pending due to 3d37000.gmu
To silence these warnings and also to have a proper state in driver core,
attach a driver to the GMU and set it up as a component device for the drm
master device.
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 70 +++++++++++++++++++++-
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 31 ++++------
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 -
drivers/gpu/drm/msm/adreno/adreno_device.c | 2 +
drivers/gpu/drm/msm/adreno/adreno_gpu.h | 3 +-
drivers/gpu/drm/msm/msm_drv.c | 18 +++---
6 files changed, 93 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
index 329b27ed1ec5..beae133ed383 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
@@ -1866,7 +1866,7 @@ void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu)
pm_runtime_put(&gpu->pdev->dev);
}
-void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu)
+static void a6xx_gmu_destroy(struct a6xx_gpu *a6xx_gpu)
{
struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
@@ -1926,7 +1926,7 @@ static int cxpd_notifier_cb(struct notifier_block *nb,
return 0;
}
-int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
+static int a6xx_gmu_wrapper_pdev_bind(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
{
struct platform_device *pdev = of_find_device_by_node(node);
struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
@@ -1976,6 +1976,8 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
goto err_mmio;
}
+ mutex_init(&gmu->lock);
+
gmu->initialized = true;
return 0;
@@ -1992,7 +1994,7 @@ int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
return ret;
}
-int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
+static int a6xx_gmu_pdev_bind(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
{
struct adreno_gpu *adreno_gpu = &a6xx_gpu->base;
struct a6xx_gmu *gmu = &a6xx_gpu->gmu;
@@ -2161,6 +2163,7 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
/* Initialize RPMh */
a6xx_gmu_rpmh_init(gmu);
+ mutex_init(&gmu->lock);
gmu->initialized = true;
return 0;
@@ -2192,3 +2195,64 @@ int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node)
return ret;
}
+
+static int a6xx_gmu_bind(struct device *dev, struct device *master, void *data)
+{
+ int (*bind)(struct a6xx_gpu *gpu, struct device_node *node) = of_device_get_match_data(dev);
+ struct a6xx_gpu *a6xx_gpu = dev_get_drvdata(dev);
+
+ if (WARN_ON(!a6xx_gpu))
+ return -ENODEV;
+
+ return bind(a6xx_gpu, dev->of_node);
+}
+
+static void a6xx_gmu_unbind(struct device *dev, struct device *master, void *data)
+{
+ struct a6xx_gpu *a6xx_gpu = dev_get_drvdata(dev);
+
+ a6xx_gmu_destroy(a6xx_gpu);
+ dev_set_drvdata(dev, NULL);
+}
+
+static const struct component_ops a6xx_gmu_bind_ops = {
+ .bind = a6xx_gmu_bind,
+ .unbind = a6xx_gmu_unbind,
+};
+
+static int a6xx_gmu_probe(struct platform_device *pdev)
+{
+ return component_add(&pdev->dev, &a6xx_gmu_bind_ops);
+}
+
+static void a6xx_gmu_remove(struct platform_device *pdev)
+{
+ component_del(&pdev->dev, &a6xx_gmu_bind_ops);
+}
+
+static const struct of_device_id a6xx_gmu_dt_match[] = {
+ { .compatible = "qcom,adreno-gmu", .data = a6xx_gmu_pdev_bind },
+ { .compatible = "qcom,adreno-rgmu", .data = a6xx_gmu_wrapper_pdev_bind },
+ { .compatible = "qcom,adreno-gmu-wrapper", .data = a6xx_gmu_wrapper_pdev_bind },
+ { }
+};
+MODULE_DEVICE_TABLE(of, a6xx_gmu_dt_match);
+
+static struct platform_driver adreno_gmu_driver = {
+ .probe = a6xx_gmu_probe,
+ .remove = a6xx_gmu_remove,
+ .driver = {
+ .name = "adreno_gmu",
+ .of_match_table = a6xx_gmu_dt_match,
+ },
+};
+
+void __init adreno_gmu_register(void)
+{
+ platform_driver_register(&adreno_gmu_driver);
+}
+
+void __exit adreno_gmu_unregister(void)
+{
+ platform_driver_unregister(&adreno_gmu_driver);
+}
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
index d1eaa849b197..9bad5332b065 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c
@@ -10,6 +10,7 @@
#include <linux/bitfield.h>
#include <linux/devfreq.h>
+#include <linux/of_platform.h>
#include <linux/firmware/qcom/qcom_scm.h>
#include <linux/pm_domain.h>
#include <linux/soc/qcom/llcc-qcom.h>
@@ -2360,8 +2361,6 @@ static void a6xx_destroy(struct msm_gpu *gpu)
a6xx_llc_slices_destroy(a6xx_gpu);
- a6xx_gmu_remove(a6xx_gpu);
-
adreno_gpu_cleanup(adreno_gpu);
kfree(a6xx_gpu);
@@ -2634,6 +2633,7 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
struct platform_device *pdev = priv->gpu_pdev;
struct adreno_platform_config *config = pdev->dev.platform_data;
struct device_node *node;
+ struct platform_device *gmu_pdev;
struct a6xx_gpu *a6xx_gpu;
struct adreno_gpu *adreno_gpu;
struct msm_gpu *gpu;
@@ -2648,16 +2648,12 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
adreno_gpu = &a6xx_gpu->base;
gpu = &adreno_gpu->base;
- mutex_init(&a6xx_gpu->gmu.lock);
-
adreno_gpu->registers = NULL;
- /* Check if there is a GMU phandle and set it up */
node = of_parse_phandle(pdev->dev.of_node, "qcom,gmu", 0);
- /* FIXME: How do we gracefully handle this? */
- BUG_ON(!node);
-
- adreno_gpu->gmu_is_wrapper = of_device_is_compatible(node, "qcom,adreno-gmu-wrapper");
+ WARN_ON(!node);
+ adreno_gpu->gmu_is_wrapper = of_device_is_compatible(node,
+ "qcom,adreno-gmu-wrapper");
adreno_gpu->base.hw_apriv =
!!(config->info->quirks & ADRENO_QUIRK_HAS_HW_APRIV);
@@ -2697,16 +2693,6 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
if (adreno_is_a618(adreno_gpu) || adreno_is_7c3(adreno_gpu))
priv->gpu_clamp_to_idle = true;
- if (adreno_has_gmu_wrapper(adreno_gpu))
- ret = a6xx_gmu_wrapper_init(a6xx_gpu, node);
- else
- ret = a6xx_gmu_init(a6xx_gpu, node);
- of_node_put(node);
- if (ret) {
- a6xx_destroy(&(a6xx_gpu->base.base));
- return ERR_PTR(ret);
- }
-
if (adreno_is_a7xx(adreno_gpu)) {
ret = a7xx_cx_mem_init(a6xx_gpu);
if (ret) {
@@ -2729,5 +2715,12 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev)
/* Set up the preemption specific bits and pieces for each ringbuffer */
a6xx_preempt_init(gpu);
+ gmu_pdev = of_find_device_by_node(node);
+ of_node_put(node);
+ if (gmu_pdev) {
+ platform_set_drvdata(gmu_pdev, a6xx_gpu);
+ put_device(&gmu_pdev->dev);
+ }
+
return gpu;
}
diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
index 0b17d36c36a9..070af413e5ad 100644
--- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.h
@@ -252,9 +252,6 @@ bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);
int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
-int a6xx_gmu_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node);
-int a6xx_gmu_wrapper_init(struct a6xx_gpu *a6xx_gpu, struct device_node *node);
-void a6xx_gmu_remove(struct a6xx_gpu *a6xx_gpu);
void a6xx_gmu_sysprof_setup(struct msm_gpu *gpu);
void a6xx_preempt_init(struct msm_gpu *gpu);
diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
index 1061d977875c..0664f5d8231c 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_device.c
+++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
@@ -420,6 +420,7 @@ void __init adreno_register(void)
return;
platform_driver_register(&adreno_driver);
+ adreno_gmu_register();
}
void __exit adreno_unregister(void)
@@ -427,5 +428,6 @@ void __exit adreno_unregister(void)
if (skip_gpu)
return;
+ adreno_gmu_unregister();
platform_driver_unregister(&adreno_driver);
}
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
index 390fa6720d9b..789aca968c18 100644
--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
+++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
@@ -588,7 +588,8 @@ int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state);
int adreno_gpu_state_put(struct msm_gpu_state *state);
void adreno_show_object(struct drm_printer *p, void **ptr, int len,
bool *encoded);
-
+void adreno_gmu_register(void);
+void adreno_gmu_unregister(void);
/*
* Common helper function to initialize the default address space for arm-smmu
* attached targets
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 6da8981fd897..b86578ef2634 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1009,7 +1009,7 @@ static const struct of_device_id msm_gpu_match[] = {
static int add_gpu_components(struct device *dev,
struct component_match **matchptr)
{
- struct device_node *np;
+ struct device_node *np, *gmu_np;
np = of_find_matching_node(NULL, msm_gpu_match);
if (!np)
@@ -1018,6 +1018,12 @@ static int add_gpu_components(struct device *dev,
if (of_device_is_available(np) && adreno_has_gpu(np))
drm_of_component_match_add(dev, matchptr, component_compare_of, np);
+ gmu_np = of_parse_phandle(np, "qcom,gmu", 0);
+ if (of_device_is_available(gmu_np))
+ drm_of_component_match_add(dev, matchptr, component_compare_of, gmu_np);
+
+ of_node_put(gmu_np);
+
of_node_put(np);
return 0;
@@ -1119,13 +1125,9 @@ int msm_gpu_probe(struct platform_device *pdev)
if (ret)
return ret;
- /*
- * The GPU pdev acts as both the component master and the sole
- * component (added by adreno_probe()). Future patches add the
- * GMU node as a second component on this same master.
- */
- drm_of_component_match_add(&pdev->dev, &match,
- component_compare_of, pdev->dev.of_node);
+ ret = add_gpu_components(&pdev->dev, &match);
+ if (ret)
+ return ret;
return component_master_add_with_match(&pdev->dev, &msm_gpu_drm_ops,
match);
--
2.47.3
@@ -2,8 +2,8 @@
# Co-Maintainer: WeirdTreeThing <bradyn127@protonmail.com>
maintainer="Alicja Michalska <ellyqw@mainlining.org>"
pkgname=linux-postmarketos-qcom-sc7180
pkgver=6.18.38
pkgrel=1
pkgver=6.18.40
pkgrel=0
pkgdesc="Mainline kernel for Qualcomm Snapdragon 7c devices"
arch="aarch64"
_carch="arm64"
@@ -41,6 +41,11 @@ case $pkgver in
esac
source="
https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-${pkgver//_/-}.tar.xz
0001-drm-msm-adreno-a6xx-Mark-cxpd-device_link-as-statele.patch
0002-drm-msm-Centralize-the-standalone-drm-device-check-f.patch
0003-drm-msm-adreno-Fix-invalid-drvdata-typecast-in-adren.patch
0004-drm-msm-Always-use-component-model-for-standalone-GP.patch
0005-drm-msm-Attach-a-driver-to-the-GMU.patch
$_config
"
builddir="$srcdir/linux-${_kernver//_/-}"
@@ -85,6 +90,11 @@ package() {
}
sha512sums="
c3e7bdd4e8cbd33282f29f0b4c11a707748f4785b9b301fcd93a1424a0989661c4499d1c8ffe15fa224175ea551a97bdddf3db7c1d7ad9b3e3a94dec0372cf37 linux-6.18.38.tar.xz
f1384adf66493a160c609ee65c89e3e7453bdc9c03a2d988f5b1af38886949acc3ae99b27f09d8ee1bcae80a90a463247ecfbaa99e4aee8b24edced9e5e7fe1c config-postmarketos-qcom-sc7180.aarch64
c79b74b450c00c3da75da59bee5659687f06d3814ebc1c9e6304a89ec756c02caedcb6067897842ea2444c794dbfb83b2feaa6a22c463fe51323ce730554f9a1 linux-6.18.40.tar.xz
9680cf56d05e629ea4740123e02dd0ea09045b0cacd3aa1ce4c6cd2b42e136011d81b9e4ee50394974a58392d3fc5e99d3c489877ce359e437fabbee8bee712e 0001-drm-msm-adreno-a6xx-Mark-cxpd-device_link-as-statele.patch
4e2180cf50f75466b510435133f510fe1f06e4f828ce0aacd0588abc5d6db432d6257a8d6fcc88103c7ceb1f93eabc2d35f154201bef86f9a3aa65367edef694 0002-drm-msm-Centralize-the-standalone-drm-device-check-f.patch
22a416eadfd30a5ffd1d065ce17d7b0bd2285d8ae902401147be8617f26d372f9400551d728769f37398462f0ba0b58cdc4443f44c1d1fb2591c3a9f88432387 0003-drm-msm-adreno-Fix-invalid-drvdata-typecast-in-adren.patch
81f83455054502d04063178761d230e9300562241826f3a7e34605b9f7e6b95271ce060c80d4841f13731d69b076d46813f3ecd945e29b33672b836847a9096c 0004-drm-msm-Always-use-component-model-for-standalone-GP.patch
74d6e28134809ecd74719dd1ee804b92ffd0a8528b555d7bcc44a59064d58010fdc1710938c0af5bbdf08e3dd3792a4fd538548dfa5192dcd35aa25df09364b5 0005-drm-msm-Attach-a-driver-to-the-GMU.patch
4b1cb6c9aef310e7a12307b62a8150da08eb361a63c76e1ddcdd5b81544ecafa89dc705ad7cb5b3c8acdbe01f0fdffa5b9fa7e4d1fa36b1f543c5989d699c271 config-postmarketos-qcom-sc7180.aarch64
"
@@ -889,7 +889,8 @@ CONFIG_BLK_DEV_THROTTLING=y
# CONFIG_BLK_CGROUP_IOPRIO is not set
CONFIG_BLK_DEBUG_FS=y
# CONFIG_BLK_SED_OPAL is not set
# CONFIG_BLK_INLINE_ENCRYPTION is not set
CONFIG_BLK_INLINE_ENCRYPTION=y
# CONFIG_BLK_INLINE_ENCRYPTION_FALLBACK is not set
#
# Partition Types
@@ -6608,6 +6609,7 @@ CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set
CONFIG_MMC_CRYPTO=y
#
# MMC/SD/SDIO Host Controller Drivers
@@ -6649,6 +6651,7 @@ CONFIG_MMC_MTK=y
CONFIG_MMC_SDHCI_XENON=y
CONFIG_SCSI_UFSHCD=y
# CONFIG_SCSI_UFS_BSG is not set
# CONFIG_SCSI_UFS_CRYPTO is not set
# CONFIG_SCSI_UFS_HWMON is not set
# CONFIG_SCSI_UFSHCD_PCI is not set
CONFIG_SCSI_UFSHCD_PLATFORM=y
@@ -7479,6 +7482,7 @@ CONFIG_QCOM_STATS=m
CONFIG_QCOM_WCNSS_CTRL=m
CONFIG_QCOM_APR=m
CONFIG_QCOM_ICC_BWMON=m
CONFIG_QCOM_INLINE_CRYPTO_ENGINE=y
# CONFIG_QCOM_PBS is not set
# end of Qualcomm SoC drivers