Bring-up of the Moto Edge 40 Pro (rtwo) on the SM8550 kernel: - dts: NT37705 DSI panel with DSC, Goodix GT9916P touch, ADSP/CDSP with pmic-glink (battery, UCSI), Adreno 740, WiFi (WCN7850/ath12k), physical keys, and USB-C DisplayPort (pmic-glink altmode -> PS5169 redriver -> FSA4480 -> QMP combo PHY -> mdss_dp0) following the sm8550-qrd layout. - DP link capped at HBR (link-frequencies on &mdss_dp0_out): the DP->HDMI converter of a common USB-C hub trains fine at HBR2 but its HDMI output flickers and drops HPD; HBR x2 still covers 1080p60. - new drivers: typec-mux-ps5169.c (Parade PS5169 redriver as typec switch/retimer), panel-novatek-nt37705.c. - patches: msm DP invalid LTTPR caps + no push_idle with the link down (hardware reset on unplug), msm DSI keeps the panel DSC config, ath12k regd fixes and MHI keep-awake, ICC keepalive for the MDP fetch path. - rtwo.config / config-motorola-rtwo.aarch64: options for all of the above. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01DnHwDU5yL8L6qgPEN5CV5m
26 lines
1.1 KiB
Diff
26 lines
1.1 KiB
Diff
--- a/drivers/interconnect/qcom/sm8550.c
|
|
+++ b/drivers/interconnect/qcom/sm8550.c
|
|
@@ -1136,6 +1136,22 @@ static struct qcom_icc_bcm bcm_mc0 = {
|
|
|
|
static struct qcom_icc_bcm bcm_mm0 = {
|
|
.name = "MM0",
|
|
+ /*
|
|
+ * qns_mem_noc_hf is the only node this BCM covers, and it's what
|
|
+ * qnm_mdp (the MDP's own interconnect master) feeds into. Our
|
|
+ * bring-up has no MDSS/DPU driver, so nothing in Linux ever calls
|
|
+ * icc_set_bw() on this path -- but the DPU hardware is still live,
|
|
+ * inherited from U-Boot, and keeps fetching the framebuffer over
|
|
+ * this exact bus. Without keepalive, icc_sync_state() (core.c,
|
|
+ * gated on every icc provider probing -- in practice on pcie0/
|
|
+ * WiFi finishing last) zeroes the firmware's boot-time vote on
|
|
+ * this BCM and the display freezes mid-boot, at a random-looking
|
|
+ * point that always lines up with pcie0 finishing probe. MC0/SH0/
|
|
+ * CN0/SN0/QUP0-2 already get this same treatment for the same
|
|
+ * reason (DDR/LLCC/config/system NoC/QUP buses that must never
|
|
+ * collapse to zero just because no driver claimed them yet).
|
|
+ */
|
|
+ .keepalive = true,
|
|
.num_nodes = 1,
|
|
.nodes = { &qns_mem_noc_hf },
|
|
};
|